MFRC522_I2C.h 25 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473
  1. /**
  2. * MFRC522_I2C.h - Library to use ARDUINO RFID MODULE KIT 13.56 MHZ WITH TAGS
  3. *I2C BY AROZCAN MFRC522_I2C.h - Based on ARDUINO RFID MODULE KIT 13.56 MHZ WITH
  4. *TAGS SPI Library BY COOQROBOT. Based on code Dr.Leong ( WWW.B2CQSHOP.COM )
  5. * Created by Miguel Balboa (circuitito.com), Jan, 2012.
  6. * Rewritten by Søren Thing Andersen (access.thing.dk), fall of 2013
  7. *(Translation to English, refactored, comments, anti collision, cascade
  8. *levels.) Extended by Tom Clement with functionality to write to sector 0 of
  9. *UID changeable Mifare cards. Extended by Ahmet Remzi Ozcan with I2C
  10. *functionality. Author: arozcan @
  11. *https://github.com/arozcan/MFRC522-I2C-Library Released into the public
  12. *domain.
  13. *
  14. * Please read this file for an overview and then MFRC522.cpp for comments on
  15. *the specific functions. Search for "mf-rc522" on ebay.com to purchase the
  16. *MF-RC522 board.
  17. *
  18. * There are three hardware components involved:
  19. * 1) The micro controller: An Arduino
  20. * 2) The PCD (short for Proximity Coupling Device): NXP MFRC522 Contactless
  21. *Reader IC 3) The PICC (short for Proximity Integrated Circuit Card): A card or
  22. *tag using the ISO 14443A interface, eg Mifare or NTAG203.
  23. *
  24. * The microcontroller and card reader uses I2C for communication.
  25. * The protocol is described in the MFRC522 datasheet:
  26. *http://www.nxp.com/documents/data_sheet/MFRC522.pdf
  27. *
  28. * The card reader and the tags communicate using a 13.56MHz electromagnetic
  29. *field. The protocol is defined in ISO/IEC 14443-3 Identification cards --
  30. *Contactless integrated circuit cards -- Proximity cards -- Part 3:
  31. *Initialization and anticollision". A free version of the final draft can be
  32. *found at http://wg8.de/wg8n1496_17n3613_Ballot_FCD14443-3.pdf Details are
  33. *found in chapter 6, Type A – Initialization and anticollision.
  34. *
  35. * If only the PICC UID is wanted, the above documents has all the needed
  36. *information. To read and write from MIFARE PICCs, the MIFARE protocol is used
  37. *after the PICC has been selected. The MIFARE Classic chips and protocol is
  38. *described in the datasheets: 1K:
  39. *http://www.nxp.com/documents/data_sheet/MF1S503x.pdf 4K:
  40. *http://www.nxp.com/documents/data_sheet/MF1S703x.pdf Mini:
  41. *http://www.idcardmarket.com/download/mifare_S20_datasheet.pdf The MIFARE
  42. *Ultralight chip and protocol is described in the datasheets: Ultralight:
  43. *http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf Ultralight C:
  44. *http://www.nxp.com/documents/short_data_sheet/MF0ICU2_SDS.pdf
  45. *
  46. * MIFARE Classic 1K (MF1S503x):
  47. * Has 16 sectors * 4 blocks/sector * 16 bytes/block = 1024 bytes.
  48. * The blocks are numbered 0-63.
  49. * Block 3 in each sector is the Sector Trailer. See
  50. *http://www.nxp.com/documents/data_sheet/MF1S503x.pdf sections 8.6 and 8.7:
  51. * Bytes 0-5: Key A
  52. * Bytes 6-8: Access Bits
  53. * Bytes 9: User data
  54. * Bytes 10-15: Key B (or user data)
  55. * Block 0 is read-only manufacturer data.
  56. * To access a block, an authentication using a key from the block's sector
  57. *must be performed first. Example: To read from block 10, first authenticate
  58. *using a key from sector 3 (blocks 8-11). All keys are set to FFFFFFFFFFFFh at
  59. *chip delivery. Warning: Please read section 8.7 "Memory Access". It includes
  60. *this text: if the PICC detects a format violation the whole sector is
  61. *irreversibly blocked. To use a block in "value block" mode (for
  62. *Increment/Decrement operations) you need to change the sector trailer. Use
  63. *PICC_SetAccessBits() to calculate the bit patterns. MIFARE Classic 4K
  64. *(MF1S703x): Has (32 sectors * 4 blocks/sector + 8 sectors * 16 blocks/sector)
  65. ** 16 bytes/block = 4096 bytes. The blocks are numbered 0-255. The last block
  66. *in each sector is the Sector Trailer like above. MIFARE Classic Mini (MF1 IC
  67. *S20): Has 5 sectors * 4 blocks/sector * 16 bytes/block = 320 bytes. The blocks
  68. *are numbered 0-19. The last block in each sector is the Sector Trailer like
  69. *above.
  70. *
  71. * MIFARE Ultralight (MF0ICU1):
  72. * Has 16 pages of 4 bytes = 64 bytes.
  73. * Pages 0 + 1 is used for the 7-byte UID.
  74. * Page 2 contains the last check digit for the UID, one byte manufacturer
  75. *internal data, and the lock bytes (see
  76. *http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf section 8.5.2) Page 3 is
  77. *OTP, One Time Programmable bits. Once set to 1 they cannot revert to 0. Pages
  78. *4-15 are read/write unless blocked by the lock bytes in page 2. MIFARE
  79. *Ultralight C (MF0ICU2): Has 48 pages of 4 bytes = 192 bytes. Pages 0 + 1 is
  80. *used for the 7-byte UID. Page 2 contains the last check digit for the UID, one
  81. *byte manufacturer internal data, and the lock bytes (see
  82. *http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf section 8.5.2) Page 3 is
  83. *OTP, One Time Programmable bits. Once set to 1 they cannot revert to 0. Pages
  84. *4-39 are read/write unless blocked by the lock bytes in page 2. Page 40 Lock
  85. *bytes Page 41 16 bit one way counter Pages 42-43 Authentication configuration
  86. * Pages 44-47 Authentication key
  87. */
  88. #ifndef MFRC522_h
  89. #define MFRC522_h
  90. #include <Arduino.h>
  91. #include <Wire.h>
  92. // Firmware data for self-test
  93. // Reference values based on firmware version
  94. // Hint: if needed, you can remove unused self-test data to save flash memory
  95. //
  96. // Version 0.0 (0x90)
  97. // Philips Semiconductors; Preliminary Specification Revision 2.0 - 01 August
  98. // 2005; 16.1 Sefttest
  99. const byte MFRC522_firmware_referenceV0_0[] PROGMEM = {
  100. 0x00, 0x87, 0x98, 0x0f, 0x49, 0xFF, 0x07, 0x19, 0xBF, 0x22, 0x30,
  101. 0x49, 0x59, 0x63, 0xAD, 0xCA, 0x7F, 0xE3, 0x4E, 0x03, 0x5C, 0x4E,
  102. 0x49, 0x50, 0x47, 0x9A, 0x37, 0x61, 0xE7, 0xE2, 0xC6, 0x2E, 0x75,
  103. 0x5A, 0xED, 0x04, 0x3D, 0x02, 0x4B, 0x78, 0x32, 0xFF, 0x58, 0x3B,
  104. 0x7C, 0xE9, 0x00, 0x94, 0xB4, 0x4A, 0x59, 0x5B, 0xFD, 0xC9, 0x29,
  105. 0xDF, 0x35, 0x96, 0x98, 0x9E, 0x4F, 0x30, 0x32, 0x8D};
  106. // Version 1.0 (0x91)
  107. // NXP Semiconductors; Rev. 3.8 - 17 September 2014; 16.1.1 Self test
  108. const byte MFRC522_firmware_referenceV1_0[] PROGMEM = {
  109. 0x00, 0xC6, 0x37, 0xD5, 0x32, 0xB7, 0x57, 0x5C, 0xC2, 0xD8, 0x7C,
  110. 0x4D, 0xD9, 0x70, 0xC7, 0x73, 0x10, 0xE6, 0xD2, 0xAA, 0x5E, 0xA1,
  111. 0x3E, 0x5A, 0x14, 0xAF, 0x30, 0x61, 0xC9, 0x70, 0xDB, 0x2E, 0x64,
  112. 0x22, 0x72, 0xB5, 0xBD, 0x65, 0xF4, 0xEC, 0x22, 0xBC, 0xD3, 0x72,
  113. 0x35, 0xCD, 0xAA, 0x41, 0x1F, 0xA7, 0xF3, 0x53, 0x14, 0xDE, 0x7E,
  114. 0x02, 0xD9, 0x0F, 0xB5, 0x5E, 0x25, 0x1D, 0x29, 0x79};
  115. // Version 2.0 (0x92)
  116. // NXP Semiconductors; Rev. 3.8 - 17 September 2014; 16.1.1 Self test
  117. const byte MFRC522_firmware_referenceV2_0[] PROGMEM = {
  118. 0x00, 0xEB, 0x66, 0xBA, 0x57, 0xBF, 0x23, 0x95, 0xD0, 0xE3, 0x0D,
  119. 0x3D, 0x27, 0x89, 0x5C, 0xDE, 0x9D, 0x3B, 0xA7, 0x00, 0x21, 0x5B,
  120. 0x89, 0x82, 0x51, 0x3A, 0xEB, 0x02, 0x0C, 0xA5, 0x00, 0x49, 0x7C,
  121. 0x84, 0x4D, 0xB3, 0xCC, 0xD2, 0x1B, 0x81, 0x5D, 0x48, 0x76, 0xD5,
  122. 0x71, 0x61, 0x21, 0xA9, 0x86, 0x96, 0x83, 0x38, 0xCF, 0x9D, 0x5B,
  123. 0x6D, 0xDC, 0x15, 0xBA, 0x3E, 0x7D, 0x95, 0x3B, 0x2F};
  124. // Clone
  125. // Fudan Semiconductor FM17522 (0x88)
  126. const byte FM17522_firmware_reference[] PROGMEM = {
  127. 0x00, 0xD6, 0x78, 0x8C, 0xE2, 0xAA, 0x0C, 0x18, 0x2A, 0xB8, 0x7A,
  128. 0x7F, 0xD3, 0x6A, 0xCF, 0x0B, 0xB1, 0x37, 0x63, 0x4B, 0x69, 0xAE,
  129. 0x91, 0xC7, 0xC3, 0x97, 0xAE, 0x77, 0xF4, 0x37, 0xD7, 0x9B, 0x7C,
  130. 0xF5, 0x3C, 0x11, 0x8F, 0x15, 0xC3, 0xD7, 0xC1, 0x5B, 0x00, 0x2A,
  131. 0xD0, 0x75, 0xDE, 0x9E, 0x51, 0x64, 0xAB, 0x3E, 0xE9, 0x15, 0xB5,
  132. 0xAB, 0x56, 0x9A, 0x98, 0x82, 0x26, 0xEA, 0x2A, 0x62};
  133. class MFRC522 {
  134. public:
  135. // MFRC522 registers. Described in chapter 9 of the datasheet.
  136. enum PCD_Register {
  137. // Page 0: Command and status
  138. // 0x00 // reserved for future use
  139. CommandReg = 0x01, // starts and stops command execution
  140. ComIEnReg = 0x02, // enable and disable interrupt request control bits
  141. DivIEnReg = 0x03, // enable and disable interrupt request control bits
  142. ComIrqReg = 0x04, // interrupt request bits
  143. DivIrqReg = 0x05, // interrupt request bits
  144. ErrorReg = 0x06, // error bits showing the error status of the last
  145. // command executed
  146. Status1Reg = 0x07, // communication status bits
  147. Status2Reg = 0x08, // receiver and transmitter status bits
  148. FIFODataReg = 0x09, // input and output of 64 byte FIFO buffer
  149. FIFOLevelReg = 0x0A, // number of bytes stored in the FIFO buffer
  150. WaterLevelReg = 0x0B, // level for FIFO underflow and overflow warning
  151. ControlReg = 0x0C, // miscellaneous control registers
  152. BitFramingReg = 0x0D, // adjustments for bit-oriented frames
  153. CollReg = 0x0E, // bit position of the first bit-collision detected on
  154. // the RF interface
  155. // 0x0F // reserved for future use
  156. // Page 1: Command
  157. // 0x10 // reserved for future use
  158. ModeReg = 0x11, // defines general modes for transmitting and receiving
  159. TxModeReg = 0x12, // defines transmission data rate and framing
  160. RxModeReg = 0x13, // defines reception data rate and framing
  161. TxControlReg = 0x14, // controls the logical behavior of the antenna
  162. // driver pins TX1 and TX2
  163. TxASKReg = 0x15, // controls the setting of the transmission modulation
  164. TxSelReg = 0x16, // selects the internal sources for the antenna driver
  165. RxSelReg = 0x17, // selects internal receiver settings
  166. RxThresholdReg = 0x18, // selects thresholds for the bit decoder
  167. DemodReg = 0x19, // defines demodulator settings
  168. // 0x1A // reserved for future use
  169. // 0x1B // reserved for future use
  170. MfTxReg =
  171. 0x1C, // controls some MIFARE communication transmit parameters
  172. MfRxReg =
  173. 0x1D, // controls some MIFARE communication receive parameters
  174. // 0x1E // reserved for future use
  175. SerialSpeedReg =
  176. 0x1F, // selects the speed of the serial UART interface
  177. // Page 2: Configuration
  178. // 0x20 // reserved for future use
  179. CRCResultRegH =
  180. 0x21, // shows the MSB and LSB values of the CRC calculation
  181. CRCResultRegL = 0x22,
  182. // 0x23 // reserved for future use
  183. ModWidthReg = 0x24, // controls the ModWidth setting?
  184. // 0x25 // reserved for future use
  185. RFCfgReg = 0x26, // configures the receiver gain
  186. GsNReg = 0x27, // selects the conductance of the antenna driver pins
  187. // TX1 and TX2 for modulation
  188. CWGsPReg = 0x28, // defines the conductance of the p-driver output
  189. // during periods of no modulation
  190. ModGsPReg = 0x29, // defines the conductance of the p-driver output
  191. // during periods of modulation
  192. TModeReg = 0x2A, // defines settings for the internal timer
  193. TPrescalerReg = 0x2B, // the lower 8 bits of the TPrescaler value. The
  194. // 4 high bits are in TModeReg.
  195. TReloadRegH = 0x2C, // defines the 16-bit timer reload value
  196. TReloadRegL = 0x2D,
  197. TCounterValueRegH = 0x2E, // shows the 16-bit timer value
  198. TCounterValueRegL = 0x2F,
  199. // Page 3: Test Registers
  200. // 0x30 // reserved for future use
  201. TestSel1Reg = 0x31, // general test signal configuration
  202. TestSel2Reg = 0x32, // general test signal configuration
  203. TestPinEnReg = 0x33, // enables pin output driver on pins D1 to D7
  204. TestPinValueReg = 0x34, // defines the values for D1 to D7 when it is
  205. // used as an I/O bus
  206. TestBusReg = 0x35, // shows the status of the internal test bus
  207. AutoTestReg = 0x36, // controls the digital self test
  208. VersionReg = 0x37, // shows the software version
  209. AnalogTestReg = 0x38, // controls the pins AUX1 and AUX2
  210. TestDAC1Reg = 0x39, // defines the test value for TestDAC1
  211. TestDAC2Reg = 0x3A, // defines the test value for TestDAC2
  212. TestADCReg = 0x3B // shows the value of ADC I and Q channels
  213. // 0x3C // reserved for production tests
  214. // 0x3D // reserved for production tests
  215. // 0x3E // reserved for production tests
  216. // 0x3F // reserved for production tests
  217. };
  218. // MFRC522 commands. Described in chapter 10 of the datasheet.
  219. enum PCD_Command {
  220. PCD_Idle = 0x00, // no action, cancels current command execution
  221. PCD_Mem = 0x01, // stores 25 bytes into the internal buffer
  222. PCD_GenerateRandomID = 0x02, // generates a 10-byte random ID number
  223. PCD_CalcCRC =
  224. 0x03, // activates the CRC coprocessor or performs a self test
  225. PCD_Transmit = 0x04, // transmits data from the FIFO buffer
  226. PCD_NoCmdChange = 0x07, // no command change, can be used to modify the
  227. // CommandReg register bits without affecting
  228. // the command, for example, the PowerDown bit
  229. PCD_Receive = 0x08, // activates the receiver circuits
  230. PCD_Transceive =
  231. 0x0C, // transmits data from FIFO buffer to antenna and
  232. // automatically activates the receiver after transmission
  233. PCD_MFAuthent =
  234. 0x0E, // performs the MIFARE standard authentication as a reader
  235. PCD_SoftReset = 0x0F // resets the MFRC522
  236. };
  237. // MFRC522 RxGain[2:0] masks, defines the receiver's signal voltage gain
  238. // factor (on the PCD). Described in 9.3.3.6 / table 98 of the datasheet at
  239. // http://www.nxp.com/documents/data_sheet/MFRC522.pdf
  240. enum PCD_RxGain {
  241. RxGain_18dB = 0x00 << 4, // 000b - 18 dB, minimum
  242. RxGain_23dB = 0x01 << 4, // 001b - 23 dB
  243. RxGain_18dB_2 =
  244. 0x02 << 4, // 010b - 18 dB, it seems 010b is a duplicate for 000b
  245. RxGain_23dB_2 =
  246. 0x03 << 4, // 011b - 23 dB, it seems 011b is a duplicate for 001b
  247. RxGain_33dB = 0x04 << 4, // 100b - 33 dB, average, and typical default
  248. RxGain_38dB = 0x05 << 4, // 101b - 38 dB
  249. RxGain_43dB = 0x06 << 4, // 110b - 43 dB
  250. RxGain_48dB = 0x07 << 4, // 111b - 48 dB, maximum
  251. RxGain_min =
  252. 0x00 << 4, // 000b - 18 dB, minimum, convenience for RxGain_18dB
  253. RxGain_avg =
  254. 0x04 << 4, // 100b - 33 dB, average, convenience for RxGain_33dB
  255. RxGain_max =
  256. 0x07 << 4 // 111b - 48 dB, maximum, convenience for RxGain_48dB
  257. };
  258. // Commands sent to the PICC.
  259. enum PICC_Command {
  260. // The commands used by the PCD to manage communication with several
  261. // PICCs (ISO 14443-3, Type A, section 6.4)
  262. PICC_CMD_REQA = 0x26, // REQuest command, Type A. Invites PICCs in
  263. // state IDLE to go to READY and prepare for
  264. // anticollision or selection. 7 bit frame.
  265. PICC_CMD_WUPA =
  266. 0x52, // Wake-UP command, Type A. Invites PICCs in state IDLE and
  267. // HALT to go to READY(*) and prepare for anticollision or
  268. // selection. 7 bit frame.
  269. PICC_CMD_CT = 0x88, // Cascade Tag. Not really a command, but used
  270. // during anti collision.
  271. PICC_CMD_SEL_CL1 = 0x93, // Anti collision/Select, Cascade Level 1
  272. PICC_CMD_SEL_CL2 = 0x95, // Anti collision/Select, Cascade Level 2
  273. PICC_CMD_SEL_CL3 = 0x97, // Anti collision/Select, Cascade Level 3
  274. PICC_CMD_HLTA = 0x50, // HaLT command, Type A. Instructs an ACTIVE PICC
  275. // to go to state HALT.
  276. // The commands used for MIFARE Classic (from
  277. // http://www.nxp.com/documents/data_sheet/MF1S503x.pdf, Section 9)
  278. // Use PCD_MFAuthent to authenticate access to a sector, then use these
  279. // commands to read/write/modify the blocks on the sector.
  280. // The read/write commands can also be used for MIFARE Ultralight.
  281. PICC_CMD_MF_AUTH_KEY_A = 0x60, // Perform authentication with Key A
  282. PICC_CMD_MF_AUTH_KEY_B = 0x61, // Perform authentication with Key B
  283. PICC_CMD_MF_READ =
  284. 0x30, // Reads one 16 byte block from the authenticated sector of
  285. // the PICC. Also used for MIFARE Ultralight.
  286. PICC_CMD_MF_WRITE =
  287. 0xA0, // Writes one 16 byte block to the authenticated sector of
  288. // the PICC. Called "COMPATIBILITY WRITE" for MIFARE
  289. // Ultralight.
  290. PICC_CMD_MF_DECREMENT =
  291. 0xC0, // Decrements the contents of a block and stores the result
  292. // in the internal data register.
  293. PICC_CMD_MF_INCREMENT =
  294. 0xC1, // Increments the contents of a block and stores the result
  295. // in the internal data register.
  296. PICC_CMD_MF_RESTORE = 0xC2, // Reads the contents of a block into the
  297. // internal data register.
  298. PICC_CMD_MF_TRANSFER = 0xB0, // Writes the contents of the internal
  299. // data register to a block.
  300. // The commands used for MIFARE Ultralight (from
  301. // http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf, Section 8.6)
  302. // The PICC_CMD_MF_READ and PICC_CMD_MF_WRITE can also be used for
  303. // MIFARE Ultralight.
  304. PICC_CMD_UL_WRITE = 0xA2 // Writes one 4 byte page to the PICC.
  305. };
  306. // MIFARE constants that does not fit anywhere else
  307. enum MIFARE_Misc {
  308. MF_ACK = 0xA, // The MIFARE Classic uses a 4 bit ACK/NAK. Any other
  309. // value than 0xA is NAK.
  310. MF_KEY_SIZE = 6 // A Mifare Crypto1 key is 6 bytes.
  311. };
  312. // PICC types we can detect. Remember to update PICC_GetTypeName() if you
  313. // add more.
  314. enum PICC_Type {
  315. PICC_TYPE_UNKNOWN = 0,
  316. PICC_TYPE_ISO_14443_4 = 1, // PICC compliant with ISO/IEC 14443-4
  317. PICC_TYPE_ISO_18092 = 2, // PICC compliant with ISO/IEC 18092 (NFC)
  318. PICC_TYPE_MIFARE_MINI = 3, // MIFARE Classic protocol, 320 bytes
  319. PICC_TYPE_MIFARE_1K = 4, // MIFARE Classic protocol, 1KB
  320. PICC_TYPE_MIFARE_4K = 5, // MIFARE Classic protocol, 4KB
  321. PICC_TYPE_MIFARE_UL = 6, // MIFARE Ultralight or Ultralight C
  322. PICC_TYPE_MIFARE_PLUS = 7, // MIFARE Plus
  323. PICC_TYPE_TNP3XXX = 8, // Only mentioned in NXP AN 10833 MIFARE Type
  324. // Identification Procedure
  325. PICC_TYPE_NOT_COMPLETE = 255 // SAK indicates UID is not complete.
  326. };
  327. // Return codes from the functions in this class. Remember to update
  328. // GetStatusCodeName() if you add more.
  329. enum StatusCode {
  330. STATUS_OK = 1, // Success
  331. STATUS_ERROR = 2, // Error in communication
  332. STATUS_COLLISION = 3, // Collission detected
  333. STATUS_TIMEOUT = 4, // Timeout in communication.
  334. STATUS_NO_ROOM = 5, // A buffer is not big enough.
  335. STATUS_INTERNAL_ERROR =
  336. 6, // Internal error in the code. Should not happen ;-)
  337. STATUS_INVALID = 7, // Invalid argument.
  338. STATUS_CRC_WRONG = 8, // The CRC_A does not match
  339. STATUS_MIFARE_NACK = 9 // A MIFARE PICC responded with NAK.
  340. };
  341. // A struct used for passing the UID of a PICC.
  342. typedef struct {
  343. byte size; // Number of bytes in the UID. 4, 7 or 10.
  344. byte uidByte[10];
  345. byte sak; // The SAK (Select acknowledge) byte returned from the PICC
  346. // after successful selection.
  347. } Uid;
  348. // A struct used for passing a MIFARE Crypto1 key
  349. typedef struct {
  350. byte keyByte[MF_KEY_SIZE];
  351. } MIFARE_Key;
  352. // Member variables
  353. Uid uid; // Used by PICC_ReadCardSerial().
  354. // Size of the MFRC522 FIFO
  355. static const byte FIFO_SIZE = 64; // The FIFO is 64 bytes.
  356. /////////////////////////////////////////////////////////////////////////////////////
  357. // Functions for setting up the Arduino
  358. /////////////////////////////////////////////////////////////////////////////////////
  359. MFRC522(byte chipAddress);
  360. /////////////////////////////////////////////////////////////////////////////////////
  361. // Basic interface functions for communicating with the MFRC522
  362. /////////////////////////////////////////////////////////////////////////////////////
  363. void PCD_WriteRegister(byte reg, byte value);
  364. void PCD_WriteRegister(byte reg, byte count, byte *values);
  365. byte PCD_ReadRegister(byte reg);
  366. void PCD_ReadRegister(byte reg, byte count, byte *values, byte rxAlign = 0);
  367. void setBitMask(unsigned char reg, unsigned char mask);
  368. void PCD_SetRegisterBitMask(byte reg, byte mask);
  369. void PCD_ClearRegisterBitMask(byte reg, byte mask);
  370. byte PCD_CalculateCRC(byte *data, byte length, byte *result);
  371. /////////////////////////////////////////////////////////////////////////////////////
  372. // Functions for manipulating the MFRC522
  373. /////////////////////////////////////////////////////////////////////////////////////
  374. void PCD_Init();
  375. void PCD_Reset();
  376. void PCD_AntennaOn();
  377. void PCD_AntennaOff();
  378. byte PCD_GetAntennaGain();
  379. void PCD_SetAntennaGain(byte mask);
  380. bool PCD_PerformSelfTest();
  381. /////////////////////////////////////////////////////////////////////////////////////
  382. // Functions for communicating with PICCs
  383. /////////////////////////////////////////////////////////////////////////////////////
  384. byte PCD_TransceiveData(byte *sendData, byte sendLen, byte *backData,
  385. byte *backLen, byte *validBits = NULL,
  386. byte rxAlign = 0, bool checkCRC = false);
  387. byte PCD_CommunicateWithPICC(byte command, byte waitIRq, byte *sendData,
  388. byte sendLen, byte *backData = NULL,
  389. byte *backLen = NULL, byte *validBits = NULL,
  390. byte rxAlign = 0, bool checkCRC = false);
  391. byte PICC_RequestA(byte *bufferATQA, byte *bufferSize);
  392. byte PICC_WakeupA(byte *bufferATQA, byte *bufferSize);
  393. byte PICC_REQA_or_WUPA(byte command, byte *bufferATQA, byte *bufferSize);
  394. byte PICC_Select(Uid *uid, byte validBits = 0);
  395. byte PICC_HaltA();
  396. /////////////////////////////////////////////////////////////////////////////////////
  397. // Functions for communicating with MIFARE PICCs
  398. /////////////////////////////////////////////////////////////////////////////////////
  399. byte PCD_Authenticate(byte command, byte blockAddr, MIFARE_Key *key,
  400. Uid *uid);
  401. void PCD_StopCrypto1();
  402. byte MIFARE_Read(byte blockAddr, byte *buffer, byte *bufferSize);
  403. byte MIFARE_Write(byte blockAddr, byte *buffer, byte bufferSize);
  404. byte MIFARE_Decrement(byte blockAddr, long delta);
  405. byte MIFARE_Increment(byte blockAddr, long delta);
  406. byte MIFARE_Restore(byte blockAddr);
  407. byte MIFARE_Transfer(byte blockAddr);
  408. byte MIFARE_Ultralight_Write(byte page, byte *buffer, byte bufferSize);
  409. byte MIFARE_GetValue(byte blockAddr, long *value);
  410. byte MIFARE_SetValue(byte blockAddr, long value);
  411. /////////////////////////////////////////////////////////////////////////////////////
  412. // Support functions
  413. /////////////////////////////////////////////////////////////////////////////////////
  414. byte PCD_MIFARE_Transceive(byte *sendData, byte sendLen,
  415. bool acceptTimeout = false);
  416. // old function used too much memory, now name moved to flash; if you need
  417. // char, copy from flash to memory
  418. // const char *GetStatusCodeName(byte code);
  419. const __FlashStringHelper *GetStatusCodeName(byte code);
  420. byte PICC_GetType(byte sak);
  421. // old function used too much memory, now name moved to flash; if you need
  422. // char, copy from flash to memory
  423. // const char *PICC_GetTypeName(byte type);
  424. const __FlashStringHelper *PICC_GetTypeName(byte type);
  425. void PICC_DumpToSerial(Uid *uid);
  426. void PICC_DumpMifareClassicToSerial(Uid *uid, byte piccType,
  427. MIFARE_Key *key);
  428. void PICC_DumpMifareClassicSectorToSerial(Uid *uid, MIFARE_Key *key,
  429. byte sector);
  430. void PICC_DumpMifareUltralightToSerial();
  431. void MIFARE_SetAccessBits(byte *accessBitBuffer, byte g0, byte g1, byte g2,
  432. byte g3);
  433. bool MIFARE_OpenUidBackdoor(bool logErrors);
  434. bool MIFARE_SetUid(byte *newUid, byte uidSize, bool logErrors);
  435. bool MIFARE_UnbrickUidSector(bool logErrors);
  436. /////////////////////////////////////////////////////////////////////////////////////
  437. // Convenience functions - does not add extra functionality
  438. /////////////////////////////////////////////////////////////////////////////////////
  439. bool PICC_IsNewCardPresent();
  440. bool PICC_ReadCardSerial();
  441. private:
  442. byte _chipAddress;
  443. byte _resetPowerDownPin; // Arduino pin connected to MFRC522's reset and
  444. // power down input (Pin 6, NRSTPD, active low)
  445. byte MIFARE_TwoStepHelper(byte command, byte blockAddr, long data);
  446. };
  447. #endif